High-entrance high-speed logic operator which has a complex digi

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307446, H03K 19017, H03K 19094, H03K 1920

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active

045146497

ABSTRACT:
In the field of large-scale-integrated digital GaAs circuits, a high-entrance high-speed logical operator utilizing so-called "quasi-normally-off" Schottky-gate field-effect transistors (MESFETS) having a low threshold voltage. By means of a single very-high-speed logic gate, the operator thus performs AND - NAND - OR functions by utilizing in an input branch a saturable resistive load in series with a pair of quasi-normally-off MESFET's each having a maximum of two Schottky gates, the drains of the transistors being connected to an output transistor of the same type. Two identical portions of circuit are mounted in parallel with an output half-branch comprising a diode in series with another saturable resistive load.

REFERENCES:
patent: 4300064 (1981-11-01), Eden
patent: 4394589 (1983-07-01), Pham et al.
IEEE Int'l Solid State Circuits Conference, Feb. 1980, N.Y. Eden et al.: "Multi-Level Logic Gate Implementation in GaAs ICs using Schottky Diode-FET Logic" pp. 122-123 & 265-266.
IEEE Spectrum, vol. 14, No. 3 Mar. 1977, New York; Van Tuyl et al., "Gallium Arsenide Spawns Speed" pp. 41-47.
IEEE Transactions on Electron Devices, vol. ED-27, No. 6, Jun. 1980 New York; Nuzillat et al., "Quasi-Normally-Off MESFET Logic for High-Performance GaAs IC's".
Zuleeg et al., "Femtojoule High-Speed Planar GaAs E-JFET Logic"; IEEE Trans. on Electron Devices; vol. Ed-25, No. 6, pp. 628-639; 6/1978.
Nuzillat et al., "LSI Oriented Logic Approach Using Quasi-normally off GaAs MESFETs"; IEEE Proc., vol. 127, Pt. I, No. 5, pp. 287-296; 10/1980.
Van Tuyl et al., "High-Speed Integrated Logic with GaAs MESFETs"; IEEE-JSSC, vol. SC-9, No. 5, pp. 269-276; 10/1974.

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