Magnetic disc control apparatus with parallel data transfer...

Managing stack transfers in a register-based processor

Managing stack transfers in a register-based processor

Mechanism for avoiding check stops in speculative accesses...

Mechanism for fast access to control space in a pipeline...

Mechanism for irrevocable transactions

Memory access address comparison of load and store queques

Memory access consolidation for SIMD processing elements...

Memory controller having front end and back end channels for...

Memory shared between processing threads

Memory store from a register pair conditional upon a selected st

Method and apparatus for affinity-guided speculative helper...

Method and apparatus for communicating between processing...

Method and apparatus for correcting an internal call/return...

Method and apparatus for executing a long transaction

Method and apparatus for mapping software prefetch...

Method and apparatus for multi-mode fencing in a...

Method and apparatus for multiple load instruction execution

Method and apparatus for operating an age queue for memory...

Method and apparatus for protecting against failures due to...