Using computation histories to make predictions

Using register rename maps to facilitate precise exception...

Validating prediction for branches in a cluster via...

Vector technique for addressing helper instruction groups...

Versatile branch-less sequence control of instruction stream...

Virtual instruction expansion based on template and...

Virtual instruction expansion using parameter selector...

Virtual shadow registers and virtual register windows

Virtual shadow registers and virtual register windows

Virtualization assist for legacy x86 floating point...

Zero overhead branching and looping in time stationary...

Zero overhead computer interrupts with task switching

Zero overhead computer interrupts with task switching

Zero-overhead loop operation in microprocessor having...