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Predecode buffer including buffer pointer indicating another...

Electrical computers and digital processing systems: processing – Processing control – Branching
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Predecoding multiple instructions as one combined...

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Predicate controlled software pipelined loop processing with...

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Predicted return address from return stack entry designated...

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Predicted return address from return stack entry designated...

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Predicted return address selection upon matching target in...

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Predicting a jump target based on a program counter and...

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Predicting for all branch instructions in a bunch based on histo

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Predicting instruction branches with a plurality of global...

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Predictors with adaptive prediction threshold

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Prefetch buffer which stores a pointer indicating an initial pre

Electrical computers and digital processing systems: processing – Processing control – Branching
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Prefetching exception vectors by early lookup exception...

Electrical computers and digital processing systems: processing – Processing control – Branching
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Prefetching instructions in mis-predicted path for low...

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Prefetching using future branch path information derived...

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Presbyopic branch target prefetch method and apparatus

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Preventing a read of a next sequential chunk in branch...

Electrical computers and digital processing systems: processing – Processing control – Branching
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Prioritized pre-fetch/preload mechanism for loading and...

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Processing device for buffering sequential and target...

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Processing element having dual control stores to minimize...

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Processing full exceptions using partial exceptions

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