Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
1999-12-10
2008-10-21
Wood, William H (Department: 2193)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S207000, C717S153000, C717S161000
Reexamination Certificate
active
07441110
ABSTRACT:
A mechanism is described that predicts the usefulness of a prefetching instruction during the instruction's decode cycle. Prefetching instructions that are predicted as useful (prefetch useful data) are sent to an execution unit of the processor for execution, while instructions that are predicted as not useful are discarded. The prediction regarding the usefulness of a prefetching instructions is performed utilizing a branch prediction mask contained in the branch history mechanism. This mask is compared to information contained in the prefetching instruction that records the branch path between the prefetching instruction and actual use of the data. Both instructions and data can be prefetched using this mechanism.
REFERENCES:
patent: 5854934 (1998-12-01), Hsu et al.
patent: 6065115 (2000-05-01), Sharangpani et al.
patent: 6212603 (2001-04-01), McInerney et al.
Charney Mark
Hartstein Allan M.
Oden Peter H.
Prener Daniel A.
Puzak Thomas R.
Buchenhorner Michael J.
International Business Machines - Corporation
Vazken Alexanian
Wood William H
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