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Chaining of blocks for optimal performance with DASD (Direct...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Changing a mode of a storage subsystem in a system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Changing page size in storage media of computer system

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Patent

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Channel-based late race resolution mechanism for a computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Checking for proper locations of storage devices in a storage de

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Checkpoint acquisition accelerating apparatus

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent

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Checkpoint and consistency markers

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Checkpoint restart method and apparatus utilizing multiple log m

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Chip card comprising means and method for managing a virtual...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chip card with integrated circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chip card with integrated circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chip protection register lock circuit in a flash memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chip protection register lock circuit in a flash memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chipset configured to perform data-directed prefetching

Electrical computers and digital processing systems: memory – Address formation – Hashing
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Chunk-specific executable code for chunked java object heaps

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Circuit and method for address translation, using update and flu

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Circuit and method for controlling memory depth

Electrical computers and digital processing systems: memory – Storage accessing and control
Patent

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Circuit and method for detecting bank conflicts in accessing...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Circuit and method for executing access control of virtual...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Circuit and method for hardware-assisted software flushing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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