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Optimised management method for allocating memory workspace...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Optimised storage addressing method

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
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Optimistic reads in a multi-node environment

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimistic reads in a multi-node environment

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Optimistic semi-static transactional memory implementations

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Optimization of cache evictions through software hints

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimization of cascaded virtual cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimization of cascaded virtual cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimization of reverse mappings for immutable guest...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Optimizations of a perform frame management function issued...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Optimized application installation using disk block relocation

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Optimized cache allocation algorithm for multiple...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized cache structure for multi-texturing

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized configurable scheme for demand based resource...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized configurable scheme for demand based resource...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized content addressable memory (CAM)

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Optimized data migration with a support processor

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Optimized function execution for a multiprocessor computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Optimized hardware cleaning function for VIVT data cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Optimized high bandwidth cache coherence mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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