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Coherency management for a “switchless”...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Coherency protocol

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherency protocol for computer cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherency techniques for suspending execution of a thread...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent shared memory processing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent signal in a multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent signal in a multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent translation look-aside buffer

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Coherent variable length reads from system memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Coherent variable length reads which implicates multiple cache l

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherently sharing any form of instant snapshots separately...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Coherently sharing any form of instant snapshots separately...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Collaborative caching of a requested object by a lower level nod

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Collision detection in a multi-port memory system

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Collision detection in a multi-port memory system

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Color correction method in a virtually addressed and physically

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Color palette RAM and D/A converter

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Color-based cache monitoring

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Column address counter with minus two subtractor for address com

Electrical computers and digital processing systems: memory – Address formation – Incrementing – decrementing – or shifting circuitry
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Column address path circuit and method for memory devices...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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