Collision detection in a multi-port memory system

Details Collision detection in a multi-port memory system Collision detection in a multi-port memory system

2008-04-22

2008-04-22

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S151000, C711S152000

Reexamination Certificate

active

07363436

ABSTRACT:
A collision detection circuit for a multi-port memory system is presented. The collision detection circuit detects a collision condition if the addresses at two or more ports at the same time match and if one of the two or more ports is writing to the memory location associated with that address. A collision flag can then be set when the collision condition exists. In some embodiments, arbitration can occur when the collision flag is set.

REFERENCES:
patent: 4104719 (1978-08-01), Chu et al.
patent: 5398211 (1995-03-01), Willenz et al.
patent: 5448714 (1995-09-01), Stodieck
patent: 6169700 (2001-01-01), Luo
patent: 6457087 (2002-09-01), Fu
patent: 6578118 (2003-06-01), Raza et al.
patent: 2003/0023823 (2003-01-01), Woo et al.
patent: 2004/0068633 (2004-04-01), Engelahardt
patent: 2004/0148559 (2004-07-01), Fetzer et al.
patent: 0 192 209 (1986-08-01), None
patent: 62-175993 (1987-08-01), None
PCT Search Report for Intl. Appl. No. PCT/US2005/000027, issued Aug. 19, 2005, 4 pages.
Written Opinion for Intl. Appl. No. PCT/US2005/000027, issued Aug. 19, 2005, 9 pages.

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