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Block address translation circuit using two-bit to four-bit enco

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent

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Block cache size management via virtual memory manager feedback

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate

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Block data mover adapted to contain faults in a partitioned...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Block erase type nonvolatile semiconductor memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent

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Block interleaving and deinterleaving method and device therefor

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Block management for mass storage

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Block management for mass storage

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Block mask ternary CAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Block mask ternary cam

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Block programmable priority encoder in a CAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Block storage memory management system and method utilizing inde

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent

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Block storage memory management system and method utilizing inde

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Block transfer method for use with parallel computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Block-level and hash-based single-instance storage

Electrical computers and digital processing systems: memory – Address formation – Hashing
Reexamination Certificate

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Block-level read while write method and apparatus

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Blocking aggressive neighbors in a cache subsystem

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Blocking processing restrictions based on addresses

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate

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Blocking processing restrictions based on page indices

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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Blocking symbol control in a computer system to serialize access

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent

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Boot read-only memory (ROM) configuration optimization

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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