Variably-sized kernel memory stacks

Varying access parameters for processes to access memory...

Vector and scalar data cache for a vector multiprocessor

Vector and scalar data cache for a vector multiprocessor

Vector processing unit with reconfigurable data buffer

Vector processor

Verification of cache prefetch mechanism

Verification of global coherence in a multi-node NUMA system

Verification of memory operations by multiple processors to...

Verifying primary and backup copies of vital information for...

Verifying the integrity of a media key block by storing...

Verifying the integrity of a media key block by storing...

Verifying the integrity of a media key block by storing...

Versatile RAM for programmable logic device

Versatile write buffer for a microprocessor and method using...

Version management of cached permissions metadata

Version management of cached permissions metadata

Vertical wavetable cache architecture in which the number of que

Very efficient technique for dynamically tracking locality...

Victim cache using direct intervention