Microcomputer with watchdog timer settings suppressing interrupt
Microcontroller based flash memory digital controller system
Microcontroller device for extending memory address by...
Microprocessing device having programmable wait states
Microprocessor with pipelining, memory size evaluation, micro-op
Microprocessor-based data processing apparatus that commences a
Minimum read rate throughput in a disk cache system
Modified aggressive precharge DRAM controller
Modifying RAS timing based on wait states to accommodate differe
Monitoring patterns of processes accessing addresses in a...
Multi-bank memory accesses using posted writes
Multi-bank memory accesses using posted writes
Multi-channel DMA with scheduled ports
Multi-phase multi-access pipeline memory system
Multi-ported memory having pipelined data banks
Multi-stage data buffers having efficient data transfer...
Multi-user virtual tape system
Multiaccess circuit including arbitration capabilities to...
Multiple masters in a memory control system
Multiple mode memory module