Multi-phase multi-access pipeline memory system

Details Multi-phase multi-access pipeline memory system Multi-phase multi-access pipeline memory system

1997-01-06

1998-07-28

Voeltz, Emanuel Todd

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

711127, 711140, 711157, 36496426, 395677, 395556, 395559, G06F 1567, G06F 1318

Patent

active

057874883

ABSTRACT:
A multi-phase, multi-access pipeline memory system includes a number, n, of processors; a pipeline memory including a latch; and a bus for interconnecting the processors and pipeline memory; a clock circuit responsive to a system clock signal divides the system clock signal into n phases for providing multiple clock signals corresponding to the n phases of the system clock signal for application to each processor to allow data and address to be transferred only during its assigned phase thereby enabling the memory and each processor to operate at the system clock rate while allowing n accesses to the memory during each system clock signal period, one access for each processor.

REFERENCES:
patent: 4392200 (1983-07-01), Arulpragasan et al.
patent: 5010476 (1991-04-01), Davis
patent: 5297267 (1994-03-01), Inoue
"CPC (Cyclic Pipeline Computer)--An Architecture Limited for Josephson and Pipelined-Memory Machines", by Shimuzu, K. et al, IEEE Transactions on Computers, Jun. 1989.

Affiliated with

Also associated with

Rating

Multi-phase multi-access pipeline memory system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-phase multi-access pipeline memory system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-phase multi-access pipeline memory system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-35355