Microcomputer with watchdog timer settings suppressing interrupt

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

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Details

711103, 711168, 710262, 714 30, G06F 1208

Patent

active

059833300

ABSTRACT:
A microcomputer capable of solving a problem in that the load of software is heavy for setting a watchdog timer in a conventional microcomputer. It includes a switching circuit which supplies a central processing unit with the output of the watchdog timer as an interrupt signal unless a memory data write mode for writing data to a memory is not designated from the outside of the microcomputer, and which inhibits an overflow signal of the watchdog timer from being supplied to the central processing unit when the memory data write mode is designated from the outside of the microcomputer.

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patent: 5619704 (1997-04-01), Yagi et al.
patent: 5864663 (1999-01-01), Stolan
patent: 5881295 (1999-03-01), Iwata

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