Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2007-02-27

2007-02-27

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

Reexamination Certificate

active

10619463

ABSTRACT:
There is provided a semiconductor integrated circuit which assures sufficiently lower power consumption of a translation look-aside buffer without deterioration of operation rate performance thereof.In the translation look-aside buffer to convert logical address into physical address, a clock enable generating circuit is provided to stop the operation clock to be supplied to the tag memory and entry memory of the translation look-aside buffer while the virtual memory valid bit Vs of the status register indicating access to the virtual memory is “0”, or while the cache-stall signal is outputted because of miss-hit in the cache, or when the access is issued with the same logical page address to the area other than the boundary area of the address range.

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patent: 5860145 (1999-01-01), Nogami
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patent: 2000-148589 (1998-11-01), None
patent: 2001-22582 (1999-07-01), None

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