Semiconductor memory device having advanced tag block

Details Semiconductor memory device having advanced tag block Semiconductor memory device having advanced tag block

2011-01-11

2011-01-11

Shah, Sanjiv (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S104000, C711S105000, C711S202000

Reexamination Certificate

active

07870362

ABSTRACT:
A semiconductor memory device includes a row decoding block for decoding an inputted address to thereby generate a logical unit cell block address and a decoded word line address; a tag block for converting the logical unit cell block address into a physical unit cell block address; a decoded address latching block for latching the decoded word line address to thereby output the decoded word line address as a word line activation signal in response to the physical unit cell block; and a cell area for outputting a data, which is stored therein, in response to the word line activation signal.

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