High-speed starvation-free arbiter system, rotating-priority...
High-speed, multiple-bank, stacked, and PCB-mounted memory...
High-throughput interconnect having pipelined and...
High-throughput interface between a system memory controller and
High-throughput interface between a system memory controller and
High-throughput interface between a system memory controller...
High-throughput UART interfaces
Highly available system test mechanism
Highly available system test mechanism
Highly concurrent DMA controller with programmable DMA channels
Highly configurable bus priority arbitration system
Highly pipelined printing system architecture
Highly reliable disk controller
Highly reliable disk controller
Highly versatile process control system controller
Highly versatile process control system controller
Highly-scalable parallel processing computer system...
History FIFO with bypass wherein an order through queue is...
History-based bus arbitration with hidden re-arbitration during
Home audio/video network for generating default control paramete