Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Patent
1999-08-25
2000-12-26
Pan, Daniel H.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
710 35, 710 38, 710 29, 711156, G06F 1340, G06F 1332
Patent
active
061674680
ABSTRACT:
A high-throughput memory access interface allows higher data transfer rates between a system memory controller and video/graphics adapters than is possible using standard local bus architectures. The interface enables data to be written directly to a peripheral device at either one of two selectable speeds. The peripheral device may be a graphics adapter. A signal indicative of whether the adapter's write buffers are full is used to determine whether a write transaction to the adapter can proceed. If the transaction can not proceed at that time, it can be enqueued in the interface.
REFERENCES:
patent: 4476527 (1984-10-01), Clayton, IV
patent: 5280587 (1994-01-01), Shimodaira et al.
Rasmussen Norman J.
Wu William S.
Intel Corporation
Pan Daniel H.
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