High-speed starvation-free arbiter system, rotating-priority...

Details High-speed starvation-free arbiter system, rotating-priority... High-speed starvation-free arbiter system, rotating-priority...

2006-10-10

2006-10-10

Rinehart, Mark H. (Department: 2111)

Electrical computers and digital data processing systems: input/

Access arbitrating

Hierarchical or multilevel arbitrating

C710S240000, C710S241000, C710S244000, C710S111000, C710S113000, C710S116000

Reexamination Certificate

active

07120714

ABSTRACT:
A two-stage arbiter system comprises a first-stage arbiter to grant a request to one of a plurality of requestors in accordance with a first arbitration scheme and a second-stage arbiter to grant one of the remaining requests in accordance with a second arbitration scheme. The first arbitration scheme may be a fast arbitration scheme such as a fixed-priority scheme, and the second arbitration scheme may be a rotating priority-based arbitration scheme or a least-recently-granted arbitration scheme. The first-stage arbiter may operate in a first pipelined stage, and the second-stage arbiter may operate in a second pipelined stage. Two-stage arbitration may help improve access of lower-priority requestors in a pipelined system. In one embodiment, a rotating-priority arbitrator includes a pseudo-random number generator to generate an amount for rotating priorities prior to arbitration. The rotating-priority arbiter may use either a counter or linear-feedback shift register to rotate priorities of requests.

REFERENCES:
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patent: 6954812 (2005-10-01), Lavigne
patent: 2003/0114120 (2003-06-01), Kwong et al.
patent: WO 0213446 (2002-02-01), None

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