Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1996-09-27
2001-11-13
Sheikh, Ayaz (Department: 2155)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S022000, C710S029000, C710S048000, C710S049000, C710S050000, C710S100000, C710S110000, C710S112000, C710S120000, C710S120000, C712S041000, C712S200000, C712S224000, C712S228000, C712S248000
Reexamination Certificate
active
06317803
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to the field of computer bus architectures. More particularly, the present invention relates to a high throughput interface between system memory and a peripheral device in a computer system.
BACKGROUND OF THE INVENTION
Personal computer systems generally include one or more local buses that permit peripheral devices to be connected to the computer system's microprocessor. One such local bus is the PCI (Peripheral Component Interconnect) bus. A design concern associated with virtually any local bus architecture is the maximum rate of data transfer, or throughput, that can be achieved on the bus. The PCI bus provides substantial improvements over its predecessors in terms of data throughput. However, certain applications require even greater throughput than PCI can provide, particularly audio, video, and 3-D graphics applications.
Audio, video, and graphics applications are typically supported by peripheral devices known as “adapters” or “accelerators”, that can be coupled to a local bus in a computer system. One way to reduce throughput requirements is to provide more local memory on the adapter. This solution reduces the amount of data that must be communicated over the bus and thus enhances the performance of the device. A disadvantage of this solution, however, is that many of these adapters use a type of memory that is expensive or difficult to obtain. Also, increasing the amount of local memory tends to increase the overall cost of the device. In addition, it may be impossible in some instances to increase the amount of local memory without purchasing a new adapter card.
In contrast, the system memory in a computer system generally includes much more memory than these adapters can provide and tends to be easier to upgrade. Hence, what is needed is a solution which will enable audio, video, or graphics adapters to more effectively make use of system memory and thereby reduce the amount of local memory that is required. In particular, what is needed is a high-throughput, component-level interconnect through which peripheral devices such as audio, video, or graphics adapters can access system memory.
SUMMARY OF THE INVENTION
A method of performing bus transactions in a computer system is provided. Each bus transaction includes an access request and a corresponding data transfer. In the method, a first bus transaction, which includes a first access request and a corresponding first data transfer, is performed on a bus by using a first transfer mode. In the first transfer mode, an access request that does not correspond to the first data transfer is prohibited from occurring between the first access request and the first data transfer. A second bus transaction, which includes including a second access request and a corresponding second data transfer, is also performed on the bus by using a second transfer mode. In the second transfer mode, an access request that does not correspond to the second data transfer is permitted to occur between the second access request and the second data transfer.
Other features of the present invention will be apparent from the accompanying drawings and from the detailed description which follows.
REFERENCES:
patent: 4805098 (1989-02-01), Mills, Jr. et al.
patent: 4851990 (1989-07-01), Johnson et al.
patent: 4916652 (1990-04-01), Schwarz et al.
patent: 4943915 (1990-07-01), Wilhelm et al.
patent: 5003465 (1991-03-01), Chisholm et al.
patent: 5023776 (1991-06-01), Gregor
patent: 5136584 (1992-08-01), Hedlund
patent: 5146569 (1992-09-01), Yamaguchi et al.
patent: 5193181 (1993-03-01), Barlow et al.
patent: 5203003 (1993-04-01), Donner
patent: 5283883 (1994-02-01), Mishler
patent: 5287486 (1994-02-01), Yamasaki et al.
patent: 5381538 (1995-01-01), Amini et al.
patent: 5398244 (1995-03-01), Mathews et al.
patent: 5440698 (1995-08-01), Sindhu et al.
patent: 5442389 (1995-08-01), Blahut et al.
patent: 5446888 (1995-08-01), Pyne
patent: 5448558 (1995-09-01), Gildea et al.
patent: 5450551 (1995-09-01), Amini et al.
patent: 5469544 (1995-11-01), Aatresh et al.
patent: 5499385 (1996-03-01), Farmwald et al.
patent: 5517626 (1996-05-01), Archer et al.
patent: 5574872 (1996-11-01), Rotem et al.
patent: 5604865 (1997-02-01), Lentz et al.
patent: 5613133 (1997-03-01), Bell et al.
patent: 5678061 (1997-10-01), Mourad
patent: 5691915 (1997-11-01), Funahashi et al.
patent: 5694141 (1997-12-01), Chee
patent: 5696910 (1997-12-01), Pawloski
patent: 5704034 (1997-12-01), Circello
patent: 5911051 (1999-06-01), Carson et al.
patent: 5911083 (1999-06-01), Kuslak
patent: 6040845 (2000-03-01), Melo et al.
patent: 6157967 (2000-12-01), Horst et al.
80386 Hardware Reference Manual, pp. 3-5 to 3-8, Intel Corporation, 1986.
“Bus Functional Description,”Pentium™Processor User's Manual, vol. 1:Pentium Processor Data Book, pp. 6-30 to 6-34, Intel Corporation, 1993.
-Tom Shanley et al., MindShare, Inc.,PCI System Architecture, Third Edition, Chapter 6, Addison-Wesley Publishing Company, Massachusetts, pp. 97-105 (1995).
Baxter Brent S.
Carson David G.
Case Colyn
Hayek George R.
Rasmussen Norman J.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Jean Frantz B.
Sheikh Ayaz
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