Latency dependent data bus transmission
Limiting write data fracturing in PCI bus systems
Linearly expandable self-routing crossbar switch
Linking addressable shadow port and protocol for serial bus...
Linking addressable shadow port and protocol for serial bus...
Livelock avoidance method
Livelock resolution
Local bus IDE architecture for a split computer system
Local bus with dynamic decoding capability
Lock mechanism for shared resources in a data processing system
Lock protocol for PCI bus using an additional "superlock" signal
Locked read/write on separate address/data bus using write...
Long-haul PCI-to-PCI bridge
Look ahead split release for a data bus
Low latency bridging between high speed bus networks
Low latency data path in a cross-bar switch providing...
Low latency system bus interface for multi-master processing...