Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2005-02-18
2010-11-23
Tung, Kee M (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S520000, C345S535000, C345S558000
Reexamination Certificate
active
07839409
ABSTRACT:
In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an I2C data bus each coupled to a host device, a method of transferring EDID from the memory device over the I2C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching.
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Chilukuri Ram
Keene David
Lattanzi John
Noorbakhsh Ali
Christensen O'Connor Johnson & Kindness PLLC
Crawford Jacinta
Tung Kee M
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