Formally proving the functional equivalence of pipelined...

Formation of masks/reticles having dummy features

FPGA circuits and methods considering process variations

FPGA customizable to accept selected macros

FPGA customizable to accept selected macros

FPGA device and method that includes a variable grain...

FPGA modules parameterized by expressions

FPGA structure having main, column and sector clock lines

FPGA with hybrid interconnect

FPGA with register-intensive architecture

Fragmentation point and simulation site adjustment for...

Framework for hierarchical VLSI design

Framework for multiple-engine based verification tools for...

Framework for rules checking utilizing resistor,...

Freeway routing system for a gate array

Frequency dependent timing margin

Frequency divider monitor of phase lock loop

Fringe RLGC model for interconnect parasitic extraction

Full flow focus exposure matrix analysis and electrical...

Full sized scattering bar alt-PSM technique for IC...