Frequency divider monitor of phase lock loop

Details Frequency divider monitor of phase lock loop Frequency divider monitor of phase lock loop

2007-06-20

2009-12-01

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07627835

ABSTRACT:
A design structure for designing, manufacturing, and/or testing a frequency divider and monitoring circuit. The circuit including a phase locked loop circuit including a voltage controlled oscillator and a feedback frequency divider, an output of the voltage controlled oscillator connected to an input of the feedback frequency divider, and output of the feedback frequency divider coupled to an input of the voltage controlled oscillator; and a frequency divider monitor having a first input, a second input and an output, the first input of the frequency divider monitor connected to the output of the voltage controlled oscillator and the second input of the frequency divider monitor coupled to an output of the feedback frequency divider.

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Office Action (Mail Date Oct. 2, 2009) for U.S. Appl. No. 11/944,795, filed Nov. 26, 2007.

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