FPGA with hybrid interconnect

Details FPGA with hybrid interconnect FPGA with hybrid interconnect

2006-08-15

2006-08-15

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07093225

ABSTRACT:
An Application-Specific Field Programmable Gate Array (FPGA) device or fabric is described for use in applications requiring fast reconfigurability of devices in the field, enabling multiple personalities for re-using silicon resources (like arrays of large multipliers in DSP applications) from moment-to-moment for implementing different hardware algorithms. In a general purpose FPGA device or fabric, this fast reconfigurability is normally implemented by special reconfiguration support circuitry and/or additional configuration memory. Unfortunately, this flexibility requires a large amount of programmable routing resource and silicon area—limiting the viability in volume production applications. This invention describes how multi-program FPGA functionalities may be migrated to smaller die by constructing hybrid FPGA/ASIC implementations that retain the multi-program capability. Also described is a multi-program FPGA fabric architecture that uses a hybrid FPGA/ASIC interconnect structure, resulting in a much smaller silicon area when customized for a particular user application.

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