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Single crystal fuse on air in bulk silicon

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Single deposition layer metal dynamic random access memory

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Patent

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Single layer configurable logic

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
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Single metal programmability in a customizable integrated...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Single-mask phase change memory element

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
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Single-poly 2-transistor based fuse element

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Slot design for metal interconnects

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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SOI device with different crystallographic orientations

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
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Split-gate power module for suppressing oscillation therein

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
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SRAM cell design

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
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SRAM device having high aspect ratio cell boundary

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
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SRAM devices and methods of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
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Stacked bit line dual word line nonvolatile memory

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Staggered bitline strapping of a non-volatile memory cell

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Staggered bitline strapping of a non-volatile memory cell

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Standard cell and semiconductor device including the same

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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Standard cell architecture and methods with variable design...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
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Standard cell for plural power supplies and related...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
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Standard cell layout arrangement for an LSI circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means
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Standard cells interconnection structure including a modified st

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
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