Scan capable dual edge-triggered state element for...

Details Scan capable dual edge-triggered state element for... Scan capable dual edge-triggered state element for...

2006-07-25

2006-07-25

Lamarre, Guy (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C327S215000, C327S218000

Reexamination Certificate

active

07082560

ABSTRACT:
An apparatus and method of scanning a dual edge-triggered flip-flop with scan capability includes a first scan slave element capable of capturing data on a positive edge of a clock signal; and a second scan slave element capable of capturing data on a negative edge of the clock signal. An apparatus and method of scanning a dual edge-triggered flip-flop with scan capability includes a scan slave element capable of capturing data on either a positive edge or a negative edge of a clock signal; wherein a control signal determines whether the scan slave element captures data on the positive edge or negative edge of the clock signal.

REFERENCES:
patent: 5646567 (1997-07-01), Felix
patent: 5656962 (1997-08-01), Banik
patent: 6300809 (2001-10-01), Gregor et al.
patent: 6348825 (2002-02-01), Galbi et al.
patent: 6943605 (2005-09-01), Thadikaran et al.
patent: 2003/0204802 (2003-10-01), Sim
patent: 2004/0041610 (2004-03-01), Kundu

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