Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Examiner
active
No affiliations
AC coupled line testing using boundary scan test methodology
Accelerated Galois data integrity crosscheck system and method
Accelerated scan circuitry and method for reducing scan test...
Accelerated test method for ferroelectric memory device
Access method for embedded JTAG TAP controller instruction...
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Profile ID: LFUS-PAI-P-225160