Virtual multi-port RAM employing multiple accesses during single
VMOS Floating gate memory device
VMOS Floating gate memory with breakdown voltage lowering region
Waveguide addressing and modulating method and apparatus
Wiring or conductor interconnect for a semiconductor device or t
Write once read only registers
Write-acknowledge circuit including a write detector and a bista
X-cell EEPROM array
Zero-cycle multi-state branch cache prediction data processing s