Bus arbitration scheme with priority switching and timer

Bus architecture for digital communications

Bus bypassing matrix switch in add-drop multiplexer

Bus circuit for eliminating undesired voltage amplitude

Bus communication method and bus communication system

Bus control device and bus control method

Bus deadlock avoidance during master split-transactions

Bus interconnect circuit including port control logic for a mult

Bus interface

Bus interface loading assembly

Bus monitor circuit for switching system

Bus signal detector

Bus structure for an image processor

Bus structure having constant electrical characteristics

Bus system having a system bus, an internal bus with functional

Bus system with address and status conductors

Bus transmission method and system

Bus-configured local area network with data exchange capability

Bus-method communication network system capable of seizing trans

Bus-to-bus interface for preventing data incoherence in a multip