Bus system with address and status conductors

Multiplex communications – Wide area network – Packet switching

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370 92, 34082507, 34082552, H04J 600

Patent

active

044266979

ABSTRACT:
A bus system with an address conductor and a status conductor onto which there are connected mutually parallel stations with programmable address decoders and with status decoders and/or status encoders, whereby the address conductor carries a sequence of address informations and the status conductor status informations timewise associated therewith. The bus system is essentially so constructed whereby the address conductor carries mutually spaced serially binary coded bit patterns of presently m address bits (address-bit pattern m), and the status conductor which is displaced relative to the address-bit pattern carries a serial bit pattern of r status bits (status-bit pattern r).

REFERENCES:
patent: 3911218 (1975-10-01), Suzuki et al.
patent: 3963870 (1976-06-01), Couder et al.
patent: 4229792 (1980-10-01), Jensen et al.
patent: 4241444 (1980-12-01), Kister
patent: 4242749 (1980-12-01), Takezoe
patent: 4290134 (1981-09-01), Hampshire

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