Bus arbitration scheme with priority switching and timer

Details Bus arbitration scheme with priority switching and timer Bus arbitration scheme with priority switching and timer

1995-06-05

1996-11-05

Ray, Gopal C.

Multiplex communications

Wide area network

Packet switching

395729, 370 856, 364240, 3642401, 3642402, 3642426, 36424292, 3642405, 364DIG1, G06F 1336

Patent

active

055726860

ABSTRACT:
A system and method for changing an arbitration priority of a bus master are described. A changing system condition can be detected and used to signal the arbiter to change the priority of one or more bus masters. Timers can be provided to delay the request of a changed priority and to return a bus master to its default priority.

REFERENCES:
patent: 4682282 (1987-07-01), Beasley
patent: 4953081 (1990-08-01), Feal et al.
patent: 5239631 (1993-08-01), Boury et al.
patent: 5269010 (1993-12-01), MacDonald
patent: 5274774 (1993-12-01), Manber et al.
patent: 5278801 (1994-01-01), Dresser et al.
patent: 5303364 (1994-04-01), Mayer et al.
patent: 5307320 (1994-04-01), Farrer et al.
patent: 5307466 (1994-04-01), Chang
patent: 5341494 (1994-08-01), Thayer et al.
patent: 5353423 (1994-10-01), Hamid et al.
patent: 5371866 (1994-12-01), Cady
patent: 5386383 (1995-01-01), Raghavachari
patent: 5392436 (1995-02-01), Jansen et al.
patent: 5416910 (1995-05-01), Moyer et al.
patent: 5430848 (1995-07-01), Waggener
patent: 5463624 (1995-10-01), Hogg et al.
patent: 5475850 (1995-12-01), Kahn
patent: 5499345 (1996-03-01), Watanabe
AM29200.TM. RISC Microcontroller User's Manual and Data Sheet, pp. 9-1 thru 9-10 (Chapter 9, DRAM Controller) 1991.

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