Reduced jitter clock generator circuit and method for...
Reduced jitter phase lock loop using a technique multi-stage...
Reduced leakage voltage level shifting circuit
Reduced line driver output dependency on process, voltage,...
Reduced noise band gap reference with current feedback and...
Reduced offset voltage comparator system
Reduced phase-shift nonlinear filters
Reduced potential generation circuit operable at low...
Reduced power consumption bi-directional buffer
Reduced power consumption clock network
Reduced RFI power pulse modulator
Reduced sensitivity power-on reset circuitry
Reduced short current circuit
Reduced skew control block clock distribution network
Reduced skew differential receiver
Reduced static phase error CMOS PLL charge pump
Reduced system bus receiver setup time by latching unamplified b
Reduced voltage pre-charge multiplexer
Reduced voltage pre-charge multiplexer
Reduced voltage swing digital differential driver