Method and apparatus for reducing even order distortion in diffe
Method and apparatus for reducing jitter and power...
Method and apparatus for reducing jitter in a delay line and...
Method and apparatus for reducing jitter in a phase locked loop
Method and apparatus for reducing leakage currents in an I/O buf
Method and apparatus for reducing lock time in dual...
Method and apparatus for reducing PLL lock time
Method and apparatus for reducing power consumption
Method and apparatus for reducing skew among input signals withi
Method and apparatus for reducing skew between input signals...
Method and apparatus for reducing the lock time of a DLL
Method and apparatus for reducing the lock time of DLL
Method and apparatus for reducing the vulnerability of...
Method and apparatus for reducing the vulnerability of...
Method and apparatus for reducing transmitter AC-coupling droop
Method and apparatus for reducing variations on damping...
Method and apparatus for robust mode selection with low...
Method and apparatus for robust mode selection with low...
Method and apparatus for routing low-skew clock networks
Method and apparatus for scanning and clocking chips with a...