Method and apparatus for reducing jitter and power...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S407000, C327S277000

Reexamination Certificate

active

06847246

ABSTRACT:
Method and apparatus for reducing power dissipation and jitter in a delay line is described. The delay line includes a plurality of delay elements. At least one of the plurality of delay elements includes a gate terminal configured to receive gate control signals for activating or deactivating one or more of the delay elements. The delay line further includes gate control circuitry for providing gate control signals to the gate terminal of at least one of the plurality of delay elements.

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patent: 6069506 (2000-05-01), Miller, Jr. et al.
patent: 6191613 (2001-02-01), Schultz et al.
patent: 6204710 (2001-03-01), Goetting et al.
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patent: 6384647 (2002-05-01), Logue
patent: 6400735 (2002-06-01), Percey
patent: 6469559 (2002-10-01), Heightley

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