Test for hold time margins in digital systems

Details Test for hold time margins in digital systems Test for hold time margins in digital systems

1996-01-31

1998-01-13

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327203, H03K 3037

Patent

active

057083800

ABSTRACT:
A flip-flop circuit that includes a first NAND gate (11) responsive to a D input to the flip-flop circuit and a first mode control signal for providing a first NAND gate output; a second NAND gate (12) responsive to a serial scan input to the flip-flop circuit and a second mode control signal for providing a second NAND gate output; an inverter (21) responsive to the first NAND gate output for providing an inverter output; a first transmission gate responsive to the first NAND gate output and the second NAND gate output for providing a first transmission gate output, the first transmission gate output being a replica of the inverter output when the first mode control signal is of a first logical state and the second mode control signal is of a second logical state, and the first transmission gate output being of high impedance when the first mode control signal is of the second logical state and the second mode control signal is of the first logical state; a second transmission gate (32) responsive to the first NAND gate output and the second NAND gate output for providing a second transmission gate output, the second transmission gate output being a replica of the first NAND gate output when the first mode control signal is of the second logical state and the second mode control signal is of the first logical state, and the second transmission gate output being of high impedance when the first mode control signal is of a first logical state and the second mode control signal is of a second logical state; and a clocked flip-flop (41) responsive to the first transmission gate output and the second transmission gate output.

REFERENCES:
patent: 5357144 (1994-10-01), Tanaka

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