Delay line loop for 1X on-chip clock generation with zero skew a

Delay pulse generating circuit

Delay regulation circuit

Delay signal generating circuit

Delay stage for a clock generator

Delay type flip-flop

Delay type flip-flop arrangement using transistor transistor log

Delay-compensated output pad for an integrated circuit and metho

Delayed monostable multivibrator

Delayed negative feedback circuit

Delayed pulse generating circuit

Delta V.sub.BE bias current reference circuit

Demultiplexer including a three-state gate

Depletion controlled switch

Depletion mode coupling device for a memory line driving circuit

Depletion-mode FET for the regulation of the on-chip generated s

Depletion/enhancement mode FET logic circuit

Deskewing time-critical signals in automatic test equipment

Detection circuit and structure therefor

Detection circuit and structure therefor