Depletion-mode FET for the regulation of the on-chip generated s

Details Depletion-mode FET for the regulation of the on-chip generated s Depletion-mode FET for the regulation of the on-chip generated s

1981-04-27

1988-04-19

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307296R, 307200B, H03L 500

Patent

active

047391910

ABSTRACT:
An on-chip regulated substrate bias voltage generator for an MOS integrated circuit includes a ring oscillator (10) for developing a true signal and its complement. The signals are applied to a charge pump (12) that includes two capacitors (C1 and C2) and a plurality of rectifiers (22, 24, and 26). The charge pump produces a substrate bias voltage (V.sub.BB) which is supplied to the gate of a depletion-mode field-effect transistor (28) whose source receives a reference voltage (V.sub.SS). The transistor forms part of a control circuit (14) coupled to the ring oscillator. In the N-channel case, the charge pumping action on the substrate drives the substrate bias negative until it reaches the sum of the reference voltage and threshold voltage of the depletion-mode transistor. This enables the control circuit to control the operation of the ring oscillator so as to regulate the substrate bias voltage.

REFERENCES:
patent: 4004164 (1977-01-01), Cranford, Jr. et al.
patent: 4115710 (1978-09-01), Lou
patent: 4142114 (1979-02-01), Green
patent: 4296340 (1981-10-01), Horan
patent: 4322675 (1982-03-01), Lee et al.
Harroun, "Substrate Bias Voltage Control", IBM Tech. Disc. Bull., vol. 22, No. 7, Dec. 1979, pp. 2691-2692.
Hummel, "Sentry Circuit for Substrate Voltage Control", IBM Tech. Disc. Bull., vol. 15, No. 2, 6-1972, pp. 478-479.
Jacobson, "Threshold Detector", IBM Tech. Disc. Bull., vol. 22, No. 7, 12-1979, pp. 2765-2767.
U.S. Defensive Publication T 954,006-Filed: 4/2/76-1/4/77, Inventor: James M. Lee (International Business Machines).

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