Directly accessing local memories of array processors for...

Distance controlled concatenation of selected portions of...

Distributed processing array with component processors performin

DPS having a plurality of like processors controlled in parallel

Dual aspect ratio PE array with no connection switching

Dynamic configurable system of parallel modules comprising chain

Dynamically assigning CPUs to different partitions each...

Dynamically reconfigurable distributed integrated circuit proces

Effecting a broadcast with an allreduce operation on a...

Energy-efficient parallel data path architecture for...

Enhanced processor element structure in a reconfigurable...

Exception handling for single instructions with multiple data

Exception reporting on function generation in an SIMD processor

Executing Multiple Instructions Multiple Data...

Executing multiple instructions multiple date...

Executing partial-width packed data instructions

Executing partial-width packed data instructions

Execution of parallel groups of threads with per-instruction...

Facilitating inter-DSP data communications

Facilitating inter-DSP data communications