Execution of parallel groups of threads with per-instruction...

Electrical computers and digital processing systems: processing – Processing architecture – Array processor

Reexamination Certificate

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C712S020000, C712S013000, C712S229000

Reexamination Certificate

active

07634637

ABSTRACT:
In a processor, a SIMD group (a group of threads for which instructions are issued in parallel using single instruction, multiple data instruction issue techniques) is logically divided into two or more “SIMD subsets,” each containing one or more of the threads in the SIMD group. Each SIMD subset is associated with a different instance of a variable state parameter. The processor determines which of the instructions to be executed for the SIMD group rely on the state variable and serializes execution of such instructions so that the instruction is executed separately for each SIMD subset. Instructions that do not rely on the state variable are advantageously not serialized.

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Eggers et al. “Simultaneous multithreading: A platform for next-generation processors” IEEE Micro, Sep./Oct. 1997(vol. 17, No. 5) pp. 12-19.

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