Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Patent
1998-05-19
2000-08-29
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
712 15, 712 32, 707 6, G06F 1580
Patent
active
061122882
ABSTRACT:
A programmable, special-purpose, pipeline processing system for processing dynamic programming algorithms. The pipeline processing system includes a plurality of accelerator chips coupled in series. The first and last accelerator chips are coupled to interface logic. Each of the accelerator chips includes an instruction processor; a plurality of pipeline processor segments coupled in series. Each of the pipeline processor segments includes a plurality of pipeline processors coupled in series. Each of the pipeline processors has an output and has as one input an output from a preceding pipeline processor and, as a set of second inputs, a corresponding set of outputs from the instruction processor. Also provided is a result processor having an output, and having as one input, an output from a prior result processor, and, as a second input, the output from one of the plurality of pipeline processors.
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Parallel Sequence Comparison and Alignment; by Richard Hughey et al. pp. 1-11.
Kim Kenneth S.
Paracel, Inc.
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