Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2007-08-02
2010-11-02
Petranek, Jacob (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S017000
Reexamination Certificate
active
07827385
ABSTRACT:
A parallel computer comprises a plurality of compute nodes organized into at least one operational group for collective parallel operations. Each compute node is assigned a unique rank and is coupled for data communications through a global combining network. One compute node is assigned to be a logical root. A send buffer and a receive buffer is configured. Each element of a contribution of the logical root in the send buffer is contributed. One or more zeros corresponding to a size of the element are injected. An allreduce operation with a bitwise OR using the element and the injected zeros is performed. And the result for the allreduce operation is determined and stored in each receive buffer.
REFERENCES:
patent: 4715032 (1987-12-01), Nilsson
patent: 5105424 (1992-04-01), Flaig et al.
patent: 5333279 (1994-07-01), Dunning
patent: 5513371 (1996-04-01), Cypher et al.
patent: 5541914 (1996-07-01), Krishnamoorthy et al.
patent: 5617538 (1997-04-01), Heller
patent: 5721828 (1998-02-01), Frisch
patent: 5822604 (1998-10-01), Ogasawara et al.
patent: 5832215 (1998-11-01), Kato et al.
patent: 5864712 (1999-01-01), Carmichael et al.
patent: 5878241 (1999-03-01), Wilkinson et al.
patent: 5892923 (1999-04-01), Yasuda et al.
patent: 5937202 (1999-08-01), Crosetto et al.
patent: 5949988 (1999-09-01), Feisullin et al.
patent: 5958017 (1999-09-01), Scott et al.
patent: 6000024 (1999-12-01), Maddox et al.
patent: 6067609 (2000-05-01), Meeker et al.
patent: 6076131 (2000-06-01), Nugent
patent: 6212617 (2001-04-01), Hardwick
patent: 6272548 (2001-08-01), Cotter et al.
patent: 6289424 (2001-09-01), Stevens
patent: 6292822 (2001-09-01), Hardwick
patent: 6334138 (2001-12-01), Kureya
patent: 6480885 (2002-11-01), Olivier
patent: 6754211 (2004-06-01), Brown
patent: 6914606 (2005-07-01), Amemiya et al.
patent: 7284033 (2007-10-01), Jhani
patent: 7444385 (2008-10-01), Blumrich et al.
patent: 2002/0016901 (2002-02-01), Carvey et al.
patent: 2002/0144027 (2002-10-01), Schmisseur
patent: 2004/0034678 (2004-02-01), Kuszmaul et al.
patent: 2004/0073590 (2004-04-01), Bhanot et al.
patent: 2005/0094577 (2005-05-01), Ashwood-Smith
patent: 2007/0245122 (2007-10-01), Archer et al.
patent: 2008/0263329 (2008-10-01), Archer et al.
patent: 2008/0301683 (2008-12-01), Archer et al.
patent: 1835414 (2007-09-01), None
Sunggu Lee; Shin, K.G., “Interleaved all-to-all reliable broadcast on meshes and hypercubes,” Parallel and Distributed Systems, IEEE Transactions on, vol. 5, pp. 449-458, May 1994.
Wikipedia. “Depth-First Search” May 5, 2007. http://web.archive.org/web/20070505212029/http://en.wikipedia.org/wiki/Depth-first—Search.
Bruck J., et al. Efficient Algorithms for all-to-all communications in multiportmessage-passing systems, Parallel and Distributed Systems, IEEE Transactions on, vol. 8, Issue: 11, pp. 1143-1156, Nov. 1997.
U.S. Appl. No. 60/271,124, filed Feb. 24, 2001, pp. 12-13, 27 and 42-43.
Office Action Dated Mar. 4, 2008 in U.S. Appl. No. 11/279,620.
Office Action Dated Sep. 3, 2008 in U.S. Appl. No. 11/279,620.
Office Action Dated Dec. 29, 2008 in U.S. Appl. No. 11/279,620.
Office Action Dated Apr. 3, 2009 in U.S. Appl. No. 11/769,367.
Office Action Dated Dec. 13, 2007 in U.S. Appl. No. 11/459,387.
Office Action Dated Jul. 11, 2008 in U.S. Appl. No. 11/459,387.
Office Action Dated Mar. 18, 2009 in U.S. Appl. No. 11/459,387.
Office Action Dated Feb. 9, 2009 in U.S. Appl. No. 11/737,286.
Sistare, et al.; Optimization of MPI collectives on clusters of large-scale SMP's, Conference on High Performance Networking and Computing, Proceedings of the 1999 ACM/IEEE conference on Supercomputing; 1999.
Tanenbaum, Structured Computer Organization, Second Edition, Prentice-Hall, Inc., 1984.
Rosenberg; Dictionarty of Computers, Information Processing & Telecommunications, Second Edition, John Wiley & Sons, 1987.
Herbordt, M.C., Weems, C.C.; “Computing Parallel Prefix and Reduction Using Coterie Structures”; Frontiers of Massively Parallel Computation; 1992; Fourth Symposium; Oct. 19-21, 1992; pp. 141-149.
Fisher, et al.; “Computing the Hough Transform on a Scar Line Array Processor”; IEEE Transactions on Pattern Analysis and Machine Intelligence; vol. II, No. 3; Mar. 1989; pp. 262-265.
Office Action Dated Jul. 20, 2009 in U.S. Appl. No. 11/737,209.
Office Action Dated Sep. 4, 2009 in U.S. Appl. No. 11/843,090.
Almasi Gheorghe
Archer Charles J.
Ratterman Joseph D.
Smith Brian E.
Biggers & Ohanian LLP
International Business Machines - Corporation
Petranek Jacob
LandOfFree
Effecting a broadcast with an allreduce operation on a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Effecting a broadcast with an allreduce operation on a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Effecting a broadcast with an allreduce operation on a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4157425