Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Patent
1998-09-30
2000-03-14
Pan, Daniel H.
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
712221, 708232, 708534, G06F 9302, G06F 940
Patent
active
060386525
ABSTRACT:
The present invention is a method and apparatus for reporting exception in a single instruction multiple data (SIMD) processor in computing an arithmetic function for a plurality of argument data. The SIMD processor is configured for processing N elements simultaneously. A sequence of instructions is re-arranged to allocate the plurality of argument data in the N elements. The N elements are processed simultaneously. The exceptions for N elements are detected simultaneously. The detected exceptions are then combined to generate a global exception.
REFERENCES:
patent: 5392385 (1995-02-01), Evangelisti et al.
patent: 5533034 (1996-07-01), Kuwata et al.
patent: 5765037 (1998-06-01), Morrison et al.
Phillips John William
Saxena Rahul
Intel Corporation
Pan Daniel H.
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