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Selectively monitoring stores to support transactional...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selectively monitoring stores to support transactional...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selectively performing fetches for store operations during...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selectively powering down tag or data memories in a cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selectively powering portions of system memory in a network...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selectively powering X Y organized memory banks

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selectively retaining a topmost subpool expansion to prevent...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Selectively unmarking load-marked cache lines during...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selectively updateable mapped data storage system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Selectivity pipelining and prefetching memory data

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Self healing memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Self managing fixed configuration raid disk in headless...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Self timed memory chip having an apportionable data bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Self-adapting cache management method and system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Self-adaptive hybrid cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Self-clocking memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Self-configuration of source-to-target mapping

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Self-contained application disk for automatically launching...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
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Self-contained memory apparatus having diverse types of memory a

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Self-invalidation method for reducing coherence overheads in a b

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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