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In-line non volatile memory disk read cache and write buffer

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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In-memory table structure for virtual address translation...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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In-memory, in-page directory cache coherency scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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In-place shadow tables for virtualization

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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In-system programming to switch memory access from one area...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Inclusion map for accelerated cache flush

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Inclusion vector architecture for a level two cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Increased data availability in raid arrays using smart drives

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Increased reliability of data stored on flash memory in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Increasing buffer locality during multiple table access...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Increasing code separation between applications

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Increasing DSP efficiency by independent issuance of store...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Increasing memory access efficiency for packet applications

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Increasing memory locality of filesystem synchronization...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Increasing priority encoder speed using the most significant...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Increasing the memory performance of flash memory devices by wri

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Increasing the memory performance of flash memory devices by...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Increasing the memory performance of flash memory devices by...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Increasing the memory performance of flash memory devices by...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Increasing the memory performance of flash memory devices by...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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