Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-08-01
2006-08-01
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S134000
Reexamination Certificate
active
07085888
ABSTRACT:
A cache class in a software-administered cache of a multiprocessor is assigned cache space that is localized to a single region of a memory and is contiguous. Synchronization and LRU operations can step sequentially through the given region, removing the need for SLB searches or the penalty for a miss, while other threads remain random access. The threads that manage each virtual memory area can then be attached to specific processors, maintaining physical locality as well.
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patent: 5875461 (1999-02-01), Lindholm
patent: 6223256 (2001-04-01), Gaither
patent: 6370622 (2002-04-01), Chiou et al.
Dawkins Marilyn Smith
Glanzman Gerald H.
Moazzami Nasser
Williams Everett
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