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Ensuring consistency of an instruction cache with a store cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Ensuring orderly forward progress in granting snoop castout...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Entertainment apparatus, information processing unit and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Entertainment system which includes an information...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Entry location in a content addressable memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Entry lockdown within a translation lookaside buffer mechanism

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Epoch-based MUD logging

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Equal access to prevent gateword dominance in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Erase block management

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Erase count differential table within a non-volatile memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Erase count recovery

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Erase history-based flash writing method

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Error containment cluster of nodes

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Error detection in cache tag array using valid vector

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Error protection for associative memory entries and lookup...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Error protection for lookup operations in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Error protection for lookup operations performed on ternary...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Error-correcting content addressable memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Establishing command order in an out of order DMA command queue

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Estimating the size of an in-memory cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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