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Substantially instantaneous storage restoration for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Substrate structure of disk array apparatus, disk array...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Subsystem and method of organizing multiplexed data

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem and method of reorganizing multiplexed data

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem and method of reorganizing multiplexed data

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem and subsystem processing method

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem replacement method

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem replacement method

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem replacement method

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystem replacement method

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Subsystems and an integrated system of these subsystems

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Successive template generation using minimal random access...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Super-coherent data mechanisms for shared caches in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Super-coherent multiprocessor system bus protocols

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Superscalar microprocessor employing away prediction structure

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Superscalar microprocessor including a cache configured to detec

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Superscalar microprocessor including a decoded instruction cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Superscalar microprocessor including a reorder buffer which dete

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Superscalar processor employing a high performance write...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Supplying voltage to a memory module

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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