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Rolling back a speculative update of a non-modifiable cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Rolling back storage subsystem reconfigurations

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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ROM addressing method for an ADPCM decoder implementation

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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ROM addressing method for an ADPCM decoder implementation

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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ROM mapping and inversion apparatus and method

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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ROM programming device, and related program output device,...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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ROM scan memory expander

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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ROM-based multiple match circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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ROM/DRAM data bus sharing with write buffer and read...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Root file system size increase on a unix based computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Root size decrease on a UNIX based computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Rotary memory storage device with cache control method and appar

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Rotating parity redundant array of independent disk and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Rotating rationed buffer refresh

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Rotation policy for SAN copy sessions of ISB protocol systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Rotationally optimized seek initiation

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Row expansion reduction by inversion for range...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Rule-based optimizing DRAM controller

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Runahead allocation protection (RAP)

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Runtime flash device detection and configuration for flash...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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