Row expansion reduction by inversion for range...

Details Row expansion reduction by inversion for range... Row expansion reduction by inversion for range...

2008-02-25

2010-10-12

Elmore, Stephen C (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S154000, C711S156000, C365S049100

Reexamination Certificate

active

07814268

ABSTRACT:
A method and circuit to implement a match against range rule functionality. A first rule entry and a second rule entry are stored. The first rule entry includes at least two consecutive identical bits. The first rule entry represents a numerical range. A first field of a binary key is compared with the first rule entry to determine whether any of the bits of the first field are not identical. A logical result of the comparison between the first field and the first rule entry is inverted to generate a first comparison result. A second field of the binary key is compared with a second rule entry to generate a second comparison result. The first comparison result is then logically ANDed with the second comparison result to determine whether the binary key falls within the numerical range represented by the first rule entry and matches the second rule entry.

REFERENCES:
patent: 6633953 (2003-10-01), Stark
patent: 7366001 (2008-04-01), Hanzawa et al.
U.S. Appl. No. 11/218,366, Not Published, Maheshwari.

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